chips

From: Pete Turnbull <pete_at_dunnington.u-net.com>
Date: Mon Jun 28 22:21:32 1999

On Jun 28, 17:41, Richard Erlacher wrote:
> Subject: Re: chips
> SInce these are electrically eraseable it's of no consequence what the
> previous program was. These parts can be viewed as a relplacement for
the
> entire 16xN series where x=L or R and N ranges from 4 to 8. They can
> effectively emulate/replace 16L8, 16R4, 16R6 and 16R8 with a few
exceptions.
> The macrocells associated with pins 19 and 12 have no feedback path of
their
> own, i.e. it must be via the adjacent macrocell. The data book (these
are
> AMD/Vantis parts) for the Lattice GAL parts will explain it adequately if
> you can't lay hands on an AMD databook.

They're not necessarily AMD; they could be Cypress parts, or one of a few
other manufacturers. Unfortunately, not all use the same erase or
programming algorithms (Lattice, National Semiconductor, and SGS Thomson
 use one algorithm; AMD, Texas, Cypress, Altera and ICT use others).

Why do you say that pins 12 and 19 have no feedback path of their own?
 They do in my data sheets...

-- 
Pete						Peter Turnbull
						Dept. of Computer Science
						University of York
Received on Mon Jun 28 1999 - 22:21:32 BST

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