8-bit IDE

From: allisonp_at_world.std.com <(allisonp_at_world.std.com)>
Date: Tue Apr 18 08:33:18 2000

On Mon, 17 Apr 2000, Richard Erlacher wrote:

> My experience with Q-Bus I/O was always spoon-fed via a DRV11-WA card. That

I find that an awkward interface. Handy though.

> serves to isolate my problems from "theirs." Would it be better done
> without the DRV11-WA? It would seem to me that, since the DE timing spec is


> straighforward, and probably every bit as fast as anything ANY DEC box with
> a Q-Bus can manage. The data I/O comes through a single address, so only
> that one address has to be word-wide, not to say it can't be. I do wonder
> whether the Q-Bus can generate the appropriate addresses, however, without
> hardware help. A bit of steering would, I believe, suffice to make the
> interface work from a word-wide bus.

Qbus output address at Bsync/ (like 8085 ALE) and you latch the address
off the databus, plus BBS7 (bankselect 7 is the IOpage) and theres your
address. The nest part of the cycle is typically an IO_read with an
optional IO_write to follow. What makes doing IDE on PDP11 is the read
before write to the same address (plays havoc with device resgisters).
the simple solution is to map all reads to base+0 to base+n and writes
to base+N to Base+n+n so reads do not overlap writes.

Received on Tue Apr 18 2000 - 08:33:18 BST

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