>Boggles the mind, doesn't it? I remember that I paid $1250 for the first
>ST506 I bought. It even said Shugart Technology rather than Seagate
>Technology . That was 5 MB.
Managed to get my St506 in mid 81 for much less than half that.
connections.
>Well, if you're willing to believe that what's in the timing diagrams,
after
>you see they clearly violate other spec's, you can do that. I prefer to
>latch the data to ensure that I have it. Likewise, whether I have to write
>two locations or the same one twice, the data has to be latched. You also
Didnt' say you didn't need the latch only you didnt need an extra FF to
track
the silo status.
>'646..'654 type device, which won't work the way that's needed because
>they're edge-triggered, you'll run up the parts count. After all, you have
>to latch the low byte on writes and the high byte on reads. I think saving
What about 573s? Thats what I used. though the proto used ls373s.
>parts by leaving out functionality is risky here. If you write the high
>byte to the latch first, then write the low byte AND high byte, in a single
>unlatched write for the low byte, it may work, but now you can't use those
>handy instructions that make the Z-80 handier than the 8080/8085.
Well true, but then I don't always use z80. one version happens to use a
8749 with a 8155 and 8251 to serialize the data for a low speed net.
I only said I didnt' require the FF to track the data, not that it would
allow INIR.
>IMHO, once you have more than two components you have to look at
>programmable logic. I'm convinced that a CPLD, a small one, in fact, is
the
>correct solution here, except in the case of an 8-bit capable drive, in
>which case no logic at all is needed, beyond what's already there.
I have 2064s and 3030s but those packages are a real pain to wirewrap.
Then I ahve to balast a erpm with the pattern and wire that too. No savings
in wiring. For a PC card, yep, the only way.
>Yes, it's been done, and if I'm going to do the 16-bit interface, I'm going
>to do it with what's essentially their code. That means a pretty similar
>interface, which, by the way, is pretty minimal. It does latch both bytes
>of the data at the port.
Still no need to do that. you only latch the data you cant transfer
immediately.
Saves one latch though you could use it for a gated buffer if you wanted to.
>What matters to me more than making the extended versions of CP/M work, is
>making the REAL CP/M work.
Been there done that. It's easy enough, I have working examples. the
problem is with 8mb logical disks I tend to fill them and ploughing through
1000+ files
is a real pita to look at on the tube and slower than sludge cpu time wise.
Keep in mind I've been running CP/M since 1.4 was new. I have over
12 systems in the room that are running CP/M now. maybe another 5
that would run save for they are on the shelf (run but, are in storage).
Running systems CP/M more than half of which are running BIOS of my
design and ZCPR3. Some have mods to CPM like banked BIOS:
* means it's anything but stock and is a production use machine.
* hurikon MLZ92 Multibus CPM 2.2, banked.
* ISC8010 (modded) with NEC BP575 and BP2190 (two of them) running
banked with 3.5" floppies. (another multibus crate)
NS* horizon (restored, dual MDS-A) running Lifeboat CP/M 1.4
* NS* horizon with expansions and my own controllers runnign banked
ZCPR/SUPRBDOS/bios (CP/M2.2 compatable with extensions).
Current controller has 71mb (RD53). Controller is WD1002WXS with
Z80 frontend to the bus. this crate is 22years old and nothing near
stock.
NS* Advantage (restoring), 15mb CCS and floppy CP/M2.2 in 128k
Has a unique bios that attaches the NS hard disk DOS tot he cpm file
system allowing definable partitions.
* CCS runing their version and also a version of 2.2 I assembled for
Compupro
Controller (disk 1A)..
DEC vt180 (in Vt100) stock
* DEC VT180 (standalone, modded) running CP/M 2.2 from romdisk.
used as testbed for IDE, bubble memory. Runs at 6mhz (z80).
* AmproLB (scsi fujitsu 45mb) no mods other than cmos and it's production.
* Kaypro with Advent TURBOrom, 1 360k 5.25 and two 781k 3.5" floppies plus
2mb ramdisk.
Visual 1050 ( restored 128k CP/M 3) with dual 5.25 96tpi 781k, 20mb
Xebec
controller.
* Visual 1050 (modded, IDE 120mb). Banked bios CP/M2.2
* Compupro crate, NS* z80 cpu with MMU added 256k ram, Disk -1a controller
and IDE (85mb).
* Epson PX-8, with 120mb wedge CPM2.2 from rom. My laptop.
Allison
Received on Tue Apr 18 2000 - 21:30:28 BST
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