YASBC Update

From: Mike Ford <mikeford_at_socal.rr.com>
Date: Sat Feb 19 02:20:43 2000

> See if there is anything glaring that I've missed. At this point, the My
>6502 feature set is "frozen", but I'm open to circuit optimization ideas. I'

Since its frozen I will just mention over in the A2 newsgroup there have
been a discussion of a VHDL 6502 running on some common gate array type
chip. Behaves mostly just like the real thing. Here is a snip with info
<note I is not ME>

I wrote a 65c02 VHDL model that I programmed into an Altera 10k30 FPGA. I
have booted Apple DOS and played Frogger. Write to me or visit my web page
for details

Scott L. Baker scd_at_teleport.com
Sierra Circuit Design www.teleport.com/~scd
Received on Sat Feb 19 2000 - 02:20:43 GMT