MITS 2SIO serial chip?

From: Peter C. Wallace <pcw_at_mesanet.com>
Date: Mon Dec 17 11:13:28 2001

On Sun, 16 Dec 2001, Richard Erlacher wrote:

> Peter, you're missing the point. However, first of all, EP6xx an EP9xx were not
> of the classic "PAL" genre. They were early CPLD's, since they contained, the
> equivalent of two or more PALs. Those were quite expensive, particularly in the
> Altera cases, since, although Intel and TI made the physical parts for them,
> they disguised it enough that folks thought of the Intel parts as being quite
> different, hence quite expensive, thereby not placing cost pressure on ALTERA.
> Since the TI parts were identical, their agreement with Altera apparently was
> that they'd be noncompetetive. The OTP's which were quite inexpensive, were, at
> least in the case of the EP6xx and EP3xx quite reasonable, though not as
> inexpensive as the 16R/L/Xnn bipolar parts from TI, NS, MMI, Signetics, and AMD
> among others.
>
> The PAL16R/L/Xnnn series were quite a bit less costly, faster, and more
> straightforward in their application than the Altera parts, however, costing <$2
> in production lots.

I think you are missing the point, In 1981 PALS were expensive...

As far as the EPXXX Parts go, I was just mentioning when we first used
programmable logic. We made low power systems so we had to wait until CMOS
parts were available at a reasonable price. When we started using Altera,
there was no second source, Intel parts were available only a few years
later, and TI after that (and only a few parts)

>
> You could without much ado accomplish the same tasks with TTL MSI/SSI. It's
> still not rocket science, and still not expensive, except that more than one
> component is involved. Several I/O board makers did that with 8250's as well.
>
>
> ----- Original Message -----
> From: "Peter C. Wallace" <pcw_at_mesanet.com>
> To: <classiccmp_at_classiccmp.org>
> Sent: Sunday, December 16, 2001 1:17 PM
> Subject: Re: MITS 2SIO serial chip?
>
>
> > On Sun, 16 Dec 2001, Ben Franchuk wrote:
> >
> > > "Peter C. Wallace" wrote:
> > > >
> > > > On Sun, 16 Dec 2001, Richard Erlacher wrote:
> > > >
> > > > > I disagree that it's a mess. I haven't looked at the requirements for a
> Z80
> > > > > peripheral since the early '80's, but I can assure you that I'd dispose
> of any
> > > > > 1st year engineering intern who couldn't whip up a suitable PAL or
> equivalent
> > > > > MSI/SSI logic to handle the generation of properly timed inputs to the
> thing in
> > > > > an hour or less.
> > > >
> > > > Sure its trivial to do now but we were talking 1981 when PALS were
> > > > expensive.
> > >
> It was as trivial then as now, if you preferred TTL SSI/MSI logic. I think you
> could do it with a 74LS00 and a 74LS74. That's about $0.25 for the two back
> then.

Not quite, you need to generate a wait state so IORQ is more than 200 nS
long (since we lost a cycle generating the RD --> IORQ delay), so you need
a tri-state output to drive IOCHRDY, and theres that niggling timing
question with the DART's clock signal. Maybe it would work with the ISA
clock, maybe not... I think you underestimate how tightly integrated the
Z80 peripherals are with Z80 bus timing...


> >
> > > I never heard about pal's until about 1990. In some ways the peripheral
> > > chips are in a really sorry shape. You have vintage slow I/O (2 MHZ?)
> > > or PC motherboard chip sets. Nothing in between. On my FPGA I can run
> > > with a 250 ns memory cycle, but need to stretch it to 625 ns for I/O.
> >
> The peripheral chips in every 1981-82 PC, PC-Clone, etc, that I've got in the
> basement (they're all in one box) are 5 MHz parts without exception. These were
> readily available to mfg's who purchased the quantity, but weren't available in
> surplus for a while.
> >
> > PALs were certainly available earlier, just expensive,
> > non-reprogramable, and power hungry. I think we used our first
> > programmable logic in 1986 (Altera EP900s and EP320s - both low power) for
> > emulation of some PC motherboard stuff in our low power V40 based embedded
> > PCs. We never used PALs but have used GALs a lot for simple decoders and
> > random logic.
>
> Bipolar logic was, indeed, power-hungry but that was the technology of the time.
> EP???' were not bipolar, they were CMOS, and, in the case of the '80's perhaps
> even NMOS. I'm not certain about that. GALs became avaiable in '84-85 and they
> were expensive for only a short time, quickly grabbing market share when folks
> realized that the 16V8 replaced the 16L8, 16R4, 16R6, 16R8, and several others.
> Once the programming algorithms were available in the common programmers and
> there was affordable software with which to use them, and I frequently used
> conversion software from PAL fuse maps to GAL parts, having developed them from
> PALASM intended for bipolar parts, I never bought another bipolar PAL. For
> obvious reasons, it wasn't long before the GALs had replaced al the 16L/R parts.
>
> > At about $.50 now they are hard to beat.
> > I think I would do most non-common (probably not Ethernet, USB or
> > video) I/O these days with FPGAs. Its great to be able to change the
> > function and pinout with just a downloadble config file. A 100K (Well
> > maybe 15K if you remove Xilinx inflation factor) SpartanII chip is only
> > $19.00...
> >



> There are several free HDL's in Verilog or VHDL for a fast ethernet interface
> that will run entirely in a small Spartan or moderate 4000-series device costing
> less than $25, but that's in quantity. Likewise, those can be implemented in
> CPLD's for about the same cost. USB is better done in a dedicated (for the USB)
> MCU, and at lower cost. Of course you have to license a Device ID. (or whatever
> they call it)


        Unless you have a compelling need to integrate the MAC part of
Ethernet into a FPGA, FPGA Ethernet is more expensive than an external
Ethernet chip. Also, It is not possible to integrate the PHY into a FPGA
at the moment (well maybe with some oddball mixed signal part) and when I
can get a 100BT Ethernet chip with integrated PHY for less than $5.00, it
would be silly to use a major portion of a $20 chip for a non standard
Ethernet interface that doesn't even have any driver support...

> > > >
> > >
> > > --
> > > Ben Franchuk --- Pre-historic Cpu's --
> > > www.jetnet.ab.ca/users/bfranchuk/index.html
> > >
> >
> > Peter Wallace
> > Mesa Electronics
> >
> >
>
>

Peter Wallace
Mesa Electronics
Received on Mon Dec 17 2001 - 11:13:28 GMT

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