MITS 2SIO serial chip?

From: Richard Erlacher <edick_at_idcomm.com>
Date: Mon Dec 17 20:38:19 2001

"Ben Franchuk" <bfranchuk_at_jetnet.ab.ca> wrote:
...
> I also wonder about FPGA's when you can't fit a 6502 in one!
>

't seems to me that there are several free HDL's of the 650x core out there,
and, since they're small, there are several FPGA's into which I understand you
can fit not only four or so cores, but the entire addressable memory space for
each of them in there as well. I've not tried that ... but ...

The 650x core is apparently known to be about 3300 gates, if you can go by their
putative gate count. However, you can check 'em out for yourself. Google will
turn up several. As you might expect, the Z80 core is quite a bit larger and
runs somewhat slower. I don't think anyone's done the 650x core "right" yet,
because most of the HDL's still are too big.

I remember the trade (~1976-77) mag's telling us that the 6502 was <1/4 the size
of the Z80 though they were in the same technology. The only way I can see that
happening, aside from the vastly reduced internal resources that the 650x has,
is a much slicker design. Of course the end user doesn't benefit from that
"slick" design, but if the thing's in mass production, the cost reflects silicon
by the pound, so a smaller chip would cost less, which it did, while yielding
more profit, which it apparently also did.

Dick

----- Original Message -----
From: "Ben Franchuk" <bfranchuk_at_jetnet.ab.ca>
To: <classiccmp_at_classiccmp.org>
Sent: Monday, December 17, 2001 1:47 AM
Subject: Re: MITS 2SIO serial chip?


> ajp166 wrote:
> > Check SMC for it.
> SMC?

It's SMsC, BTW.

> > I hate sockets and try to avoid them, I've had equipment that
> > didn't use the machined pin sockets and most all had to be
> > rebuilt sans sockets at one point or another.
> In this case I plan to use good sockets.
> > A lousy one if you have a raft of TTL and few FPGAs. ;)
>
> All the TTL is in the FPGA.:)
> Most of the TTL used is simple buffering or decoding.
>
> > I have a few of the Lattice and Xilinx tools, older ones and the synario
> > stuff too. I just dont get all that excited about it. I've designed a
> > cpu and built it years ago, it out of my system and not worth repeating.
>
> The whole point of the cpu I designed, was because I am not happy
> with 8 bit micro's, RISC machines, or INTEL. Now what I wonder about
> is people that put a 6502 in a FPGA while you still can buy the real
> thing?
> I also wonder about FPGA's when you can't fit a 6502 in one!
>
> > Any cpu I'd do would need software and that means it would likely
> > be a copy of something... likely something I have.
>
> I can guarantee you don't have a 12/24 bit cpu like mine. ( Not that you
> would
> want one :) )
> > Allison
> --
> Ben Franchuk --- Pre-historic Cpu's --
> www.jetnet.ab.ca/users/bfranchuk/index.html
>
>
Received on Mon Dec 17 2001 - 20:38:19 GMT