Altair Repair

From: Dwight K. Elvey <dwight.elvey_at_amd.com>
Date: Mon Aug 2 13:06:15 2004

Hi Marvin
 There is a front panel schematic, someplace on
the net but I don't recall where. There was
a CDROM set released that had it as well ( as I recall ).
 You should also note that any card with DRAM on it
is most likely not going to work unless things are
matched with the CPU card. Most early machines did
different things for the refresh clocking. I know
that I added a kludge to my Poly88 CPU card to get
the EconoRam board to work with it, that I got from
SD Sales. Other DRAM boards have different setups.
Dwight


>From: "Marvin Johnston" <marvin_at_rain.org>
>
>
>"Dwight K. Elvey" wrote:
>
>> It sounds like the front panel isn't jamming the correct
>> instructions onto the data bus ( or something on the data
>> lines of the CPU is loading one of the data lines ).
>> The front panel works by either jamming a JMP ( 0C3h ) instruction
>> onto the CPU's bus or a NOP ( 00h ). This allows for both changing
>> address and incrementing the address. The front panel can then
>> override the read and write operations to the physical memory
>> during the increment.
>
>Since this does appear to be related to the databus and getting the
>correct information to the CPU, I'll start by checking to make sure the
>JMP and NOP instructions are getting out on the bus. What is interesting
>is that the switch settings seem to have almost no effect on anything
>until I turn them all on. But the JMP and NOP buffers could well cause
>some problems. Wish I could find my Jade Board quickly :). Right now,
>I'm using a Bob Mullens S-100 extender card with the High, Low, Pulse
>LED indicators ... may have to actually fire up the scope if I don't
>find out the problem fairly soon.
>
>> The most common problem I've seen that causes similar effects
>> is that there are several 7406 ( or similar OC buffers ) connected
>> from the front panel to the data lines of the CPU. One or more
>> of these devices has failed ( I suspect this is mostly do to
>> some overlap timing and stressing of the parts but that is
>> the way they are designed ). One other thing that I've seen
>> is that the data lines going to the CPU from the front panel
>> were wired upside down. This is that cable between the two.
>> ( soemone put the cable together backwards )
>
>This is one of the original style Altairs where the wiring between the 4
>slot motherboards and the front panel are all done with discrete wires.
>Makes me wonder if the 2 MHz clock speed is too fast :). I've checked
>out all the data and control lines from the front panel to the bus and
>everything seems to be correct. I did notice that the Phase 2 clock
>doesn't register on the Bob Mullens card, but that may be because the
>pulse length is too short for the card to read (123 w/ 10 pf cap and
>about 6.? K resistor.)
>
>Thanks!
>
Received on Mon Aug 02 2004 - 13:06:15 BST