Flash ADC selection, or other approach?
I'm a fair designer, but could use a hand at parts selection,
to build a device to suck data off an old rotating memory.
Generally-speaking, I need a little box (black box) that
can slurp serial data off five parallel serial streams,
synchronously. The native data rate is 80KHz, there are 128
sectors (sector = 32-bit word) per track, 4096 bits/track.
Our previous discussion imposing 16X (say) sample rate on
12.5uS/bit is 1.28Msamples/sec, five channels. 4 bits vertically
seems adequate.
All five tracks must be sampled at the same time; internal
machine timing is derived by random logic hung off the timing
tracks. Channel-to-channel skew or offset would render the
data worthless. Can't read one track, then the next, etc.
(That said, it would be possible, if troublesome, to read only
two channels at a time, where one channel is always the clock
track, but that presupposes the clock track is perfect. I think
with all five simultanously sampled I could "fix" a glitch in the
clock track and re-write it, but that process will degrade if not
simultaneous. I don't think the hardware savings are worth it.)
With that assumption, it's 65536 samples/track, five tracks.
With a trivial architecture of one 4-bit sample stored per
memory byte, it's 320K bytes. Seeing how even little SBCs have
a megabyte this will do.
As I see it, my two practical (read: lazy) choices are build
something around a little SBC, or some kludge around a "PC".
The SBC approach: There are many $99 single board computers,
many with A/D, but most of them are obsessed with bit depth (10
to 16) and not samples/sec in the lower-cost range. But sticking
a five 4-bit ADCs on parallel ports, and every sample-interval,
strobing all ADCs and reading 5 nybbles/bytes into local RAM, and
a separate command to dump sampled data to a PC via serial port.
The PC approach is to somehow wangle the five ADCs into the PC
such that it will accept the 65536 5-byte (5-nybble) samples
with ZERO LATENCY. There's plenty of memory, but my guess
is simply adapting 5 ADCs onto the PC parallel port, or funny
hardware to talk USB (and I don't think USB will guarnetee me my
latency) is as much work as the SBC solution, which, if coded
in assembly, will be plenty fast enough and trivial to build
(and easy to test).
I favor the SBC approach, as it would make a useful tool for
others and it's platform independent.
I can't find 4-bit flash ADCs! The smallest ADC on digikey is
8 bits, which is of course fine, but Analog Device's idea of
fast is 2.5uS conversion, and they're $15/each.
Anyone know of 4-bit ADCs? Or am I barking up the wrong tree
here?
Received on Mon Oct 18 2004 - 20:31:20 BST
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