HDL vs. schematics (was Re: ebay - cardamatic)

From: Eric Smith <eric_at_brouhaha.com>
Date: Wed Feb 16 02:30:53 2005

I wrote:
> In VHDL, if you want an adder with inputs A and B, and output C,
> you would write:
> A <= B + C;

Well, fubar. It's going to be hard for me to convince anyone of the
merits of VHDL if I can't write a simple thing like that correctly.
It obviously should have been:
          C <= A + B;

Sorry about that. What can I say. It's late and I'm tired. G'nite.

Eric
Received on Wed Feb 16 2005 - 02:30:53 GMT