HDL vs. schematics (was Re: ebay - cardamatic)

From: Mike Cesari <mcesari_at_comcast.net>
Date: Wed Feb 16 10:28:22 2005

On Feb 16, 2005, at 1:30 AM, Eric Smith wrote:

> I wrote:
>> In VHDL, if you want an adder with inputs A and B, and output C,
>> you would write:
>> A <= B + C;
>
> Well, fubar. It's going to be hard for me to convince anyone of the
> merits of VHDL if I can't write a simple thing like that correctly.
> It obviously should have been:
> C <= A + B;
>
> Sorry about that. What can I say. It's late and I'm tired. G'nite.
>
> Eric
>

Ah, but you showed another advantage of HDLs -- maintenance. How long
would it have taken to notice the problem using schematics? Usually
at the prototype stage when doing anything that is non-trivial.

Mike
Received on Wed Feb 16 2005 - 10:28:22 GMT