VUPs to MIPS

From: William Donzelli <william_at_ans.net>
Date: Thu Jan 8 11:39:20 1998

> The
> problem with RISC is that compilers have to work hard to use the full
> capability of the cpu.

This may have been the problem with early RISC machines, but not so much
anymore. Today's compilers are far better than those just 10 years ago
(believe it or not, a modern compiler, if given good code, can generate
executables just about as nice as the average assembly programmer can),
and most of the RISC machines are getting CISCy.

> next. The 8088 also does this albeit weakly. With the RISC machines also
> doing super pipining the number of clock cycles became less meaningful
> and the "MIPS" did as well. Adding things like caches complicates this
> more as a cache flush or processor lock can really tie things up for long
> periods of time affecting performance.

Or vector computation (Crays, big Cybers, VIS and MMX (lame vectors)).
They really add problems in the MIPs arena.

William Donzelli
william_at_ans.net
Received on Thu Jan 08 1998 - 11:39:20 GMT