HP2100 core memory problems

From: Joe <rigdonj_at_intellistar.net>
Date: Thu Aug 19 08:35:25 1999

Jay,

   It's possible that you have a problem in the parity generator and/or checking circuit. Is there anyway that you can turn off parity checking and check each word bit for bit against what you wrote?

   Joe

At 08:56 PM 8/18/99 -0500, you wrote:
>Well, once again I come to the well for knowledge.....:) Seeking advice from
>those up on core memory
>
>I'm kinda lost on checking out the memory in my HP 2100. I have two 2100's,
>each with four 8K boards or 32k per machine. I had lots of parity errors so
>I lined up all eight 8K boards on the bench and reconfigured the memory
>controller for 8K total rather than 32K (test one board at a time). I put in
>one of the boards and ran a small memory test (not a diag tape, but a core
>memory test from the CE guide via the front panel).The core test has three
>"controlling" locations, one location for the first address to test, one for
>the last address, and then how many cycles per memory location. A cycle is
>defined as writing all zeros, read, and compare - then writing all ones,
>read, and compare all on a single location.
>
>Here's the symptoms. The full test of 8K takes about 2 hours (with a cycle
>of 3). On different boards it gets to different locations before the parity
>error halt. So far mostly at the middle or end, I don't recall it ever
>parity halting towards the beginning. I'll get a parity error halt on say
>location 012336 for example. I then manually go to the failing location and
>try storing different values in the location and reading them back out (all
>via the front panel). Most of the time this gives a parity error like you
>would expect. But - many times it doesn't. Then just for kicks I restart the
>diagnostic a few locations lower (like 012320 in this example) than the
>failing location. It fails right away usually (like location 012322), quite
>a few cells before the location which originally failed. This causes me
>great confusion, because it's actually now failing on addresses which
>previously tested OK just a few minutes ago on the previous test pass.
>
>Every 8K board I have exhibits this problem, but all at different locations.
>Supposedly both machines worked fine before they were put in storage 20
>years ago, so these weren't picked up out of a junk heap or anything.
>Cosmetically they're beautiful inside and out. I've also tried switching the
>XY driver boards, the memory controller, etc. etc. but I can't seem to get
>anything stable enough to start intelligently swapping parts when every
>combination is bad. In case it matters, each 8K board is 17 bits per word (1
>parity plus 16 data bits). Also, it isn't a complete failure - I've keyed in
>many other programs from the front panel and read in paper tapes (a suite of
>I/O tests and such) that all run fine so I know the system is somewhat
>coherent. I've checked the power supply for the memory cage and it's
>supposed to be 20 volts - my VOM came up with 20.48 ISTR, which is probably
>close enough I would think. Can anyone suggest a course of action or
>possible culprits in this situation? I suspect I can't see the forest for
>the trees anymore :)
>
>Thanks!
>
>Jay West
>
>
Received on Thu Aug 19 1999 - 08:35:25 BST