PDP era and a question

From: Richard Erlacher <edick_at_idcomm.com>
Date: Thu Aug 26 20:30:18 1999

addressing only the comment quoted below . . .

Really, Tony, I think you overemphasize the importance of the individual
user to the semiconductor manufacturers. The level of competition for the
FPGA business has escalated to where the development software, previously
costing several K-bucks US, now costs as little as $100, and, in the case of
ALTERA, is quite free. Now, that's not the complete package with all the
bells and whistles, but it's enough to build a device from start to finish.

I really doubt that it would turn out to be illegal to take the old 11-70 or
whatever schematic and essentially clone it in an FPGA, but I doubt a clever
rebuilder would want to do that anyway. It might be either equally good in
the end product to build the thing so it's thriftier than the TTL design
would be, yet still a bit faster, or so it's quite a bit faster and perhaps
not quite the same. It doesn't have to be identical to run the same code.

The technology in FPGA's these days is such that it enables devices to
operate between 10 and 50 times the speed of the old TTL logic designed in
the '70's. That doesn't mean you can take a '70's design and
"transliterate" it and make it run lots faster, though that is conceivable.
What it does mean is, similarly to translating poetry from one language to
another, logical constructs can be ported from one technology to the other,
changing the outward and physical details of the circuitry, yet preserving
the upper-level sense of the logic in such a way that it capitalizes on the
available enhancements, thereby yielding a product which is quite different
from the original, yet performs the identical task in more or less the same
way at MUCH greater speed, or MUCH lower complexity, and, hopefully lower
cost.

Once you've translated a poem, you've done the same work as the poet, more,
in fact, yet you've created nothing new. OTOH, in the case of the computer,
redesigned to capitalize on new technology, I believe you could argue that
it is, indeed, something quite new. If it were to be generated for, say , a
XILINX part of the 5200 series, it would not necessarily be very costly, nor
would it be difficult once one has the original print set as crib sheets.
What's more, it would potentially be so much faster than the original, and
take up so much less space, e.g. a 2" square package, you could build the
MMU into it and interface it directly to the DRAMs, maybe adding a circuit
to copy the ROM code into RAM during its boot.

Schematic entry would be the easiest way to clone the prints, but HDL is
considered by many to be the best way to implement an architecture, the
behavior of which is well defined and understood. If you build your device
in VHDL or VERILOG, it is inherently portable, since both XILINX and Altera,
among others, support both.

Building a device like this in several parts merely ups the cost, since
resources are consumed by the interconnection between them. Time is used up
in the interconnections as well, so performance would be lower. When all is
said and done, the single FPGA is the "right" notion.

I don't think the FPGA makers would care if you use their parts to craft a
device. If you have the HDL code, nearly any distributor will provide you
access to the resources to implement it in a product they sell, provided you
buy the parts from them. They cost a few dollars in small quantity, but if
you say the right "things" when approaching them, and seem sufficiently
eccentric, they'll treat you right.

Dick
-----Original Message-----
From: Tony Duell <ard_at_p850ug1.demon.co.uk>
To: Discussion re-collecting of classic computers
<classiccmp_at_u.washington.edu>
Date: Thursday, August 26, 1999 4:08 PM
Subject: Re: PDP era and a question


<snip>
>I am sure it's illegal to (say) take the PDP11/70 printset, modify it so
>that it could work in an FPGA (and there would be significant mods), and
>implement it like that. I am not so sure there would be any problem if
>you just took the instruction set and designed a CPU to run it without
>using any DEC printsets. People have done this with the PDP8 for many
years.
>
>
>>
>> Given the complexity of the 11/70 CPU it should be possible to put the
>> entire thing inside a relatively inexpensive FPGA these days. Given
>> something like NetBSD that is already multi-architecture aware, that
would
>> make it possible to have an open source OS running on it. We could
>> potentially get to a system that was completely "open hardware." (ie
anyone
>> could build one with no royalty requirements, and hackers could build
them
>> for fun.)
>
>If you wanted to do this, then it would probably be easier to design a
>CPU from scratch (which is not hard) that was better suited to running
*BSD.
>
>Also, be warned that if you're going to use FPGAs you have to use the
>manufacturer's tools which are not going to be Open-Source, and which are
>not going to run under Open-Source OSes. Several of us have moaned about
>this for quite a time, but alas there are no 100% documented FPGAs out
>there, and if anyone manages to crack the configuration format, you can
>bet the manufacturers will change it, along with a 'free update' to the
>official tools.
>
>In other words, the machine won't really be free for anyone to construct.
>
>-tony
>
Received on Thu Aug 26 1999 - 20:30:18 BST

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