At 08:06 PM 8/26/99 -0400, Allison wrote:
> The base
> PDP-11 (11/20, LSI11, T11) has 8 16bit registers plus flags and maybe
> temps for internal use.
One of the unique features of the Xlinix FPGAs is that their
"configuration" memory is RAM and if you are not using it to configure
logic gates you can use it as RAM. The XC4010 has "400" CLBs (Complex Logic
blocks) and each logic block is capable of implementing a 4 x 16 (16
nybble) synchronous dual-port register file. So four CLBs give you 16 16
bit registers to play with with 396 CLBs left over.
To Tonys comment about speed, yes the 50Mhz number is deceptive in that
logic delays will make the effective speed slower. Several references have
placed the "effective" speed at 1/3 to 1/2 the FPGA's speed (or in this
case 16 - 25 Mhz) however for a bit more money, you can get a 200Mhz
version of the same part.
There is a very nice evaluation board for this part available from
http://www.xess.com/FPGA/ that I've got and will be using in my first tests.
I did a preliminary "floor plan" for the PDP-8 and it used just under 1/3
of the 4010 (or 75% of a 4005 given the routing issues, which leaves enough
to do an M8660 serial port.)
--Chuck
Received on Thu Aug 26 1999 - 20:05:04 BST