Z-80 M1?

From: Hans Franke <Hans.Franke_at_mch20.sbs.de>
Date: Wed Mar 31 15:18:03 1999

> I have never really understood the purpose of the M1 pin or cycle. Can
> anyone in simple terms explain it's purpose?

M1 serves various purpose on the Z80 Bus:
- Together with MREQ it indicates an opcode fetch.
- Together with IORQ it indicates an vectored interupt acknowlege,
  ordering the peripherial device to issue the vector number.
- Z80 I/O devices use M1 as 'programming finished' signal -
  so, for example, if you set a Z80 PIO to interrupt mode,
  the seting data will be transfered during the IORQ/WR cycle
  (Trailing edge of T2), but the actual enabeling will be postponed
  until the falling edge of M1 - just to be in an safe state.

Basicly M1 is only one member in a group of three status signals
to show the internal workflow:
0 0 1 Opcodefetch (first byte)
0 1 1 Opcodefetch (2nd or 3rd byte)
1 1 1 Working
1 0 0 DMA
1 0 1 DMA
0 0 0 HALT
1 1 0 SLEEP (Z180)
0 1 0 Invalid (should nor occure)

As you see, or-ing ST and M1 and connecting the result to a
frequency counter gives a prety good instructions per time
indicator (MIPS-o-meter :).

I hope this was simpel _and_ complete :)

BTW, on the Z180 the M1 (together with the 64180 'early' IORQ/RD
signal enabeling) usage can be programmed via the OMCR - I had to
learn it the hard way (no, RTFM is no solution if you belive that
you know the signal handling :).

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Received on Wed Mar 31 1999 - 15:18:03 BST

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