Priority for a QDSS color framebuffer?

From: Megan <mbg_at_world.std.com>
Date: Sun Nov 7 10:00:22 1999

>Where is the color frame buffer normally placed relative to everything
>else in a Vaxstation II/GPX ? (everything else being defined as ethernet,
>TQK70, disk, and async muxes)

According to the Vaxstation II/GPX hardware manual, the correct
sequence of boards is:

        1) CPU
        2) Memory
        3) Ethernet interface
        4) VCB02 base
        5) VCB02 memory
        6) VCB02 memory
        7) Async comm (DZQ)
        8) Asyn multiplexor (DHV)
        9) Sync Comm (DMV)
        10) Disk controller (RQDX3)
        11) Tape controller (TQK50)

But I have always placed the disk controller after the ethernet
interface and before the VCB02... it puts the controller electrically
closer to the CPU, which should make disk I/O a little faster (I know,
almost infinitesimal, but the delay has got to be measurable, and
adds up over time).

                                        Megan Gentry
                                        Former RT-11 Developer

+--------------------------------+-------------------------------------+
| Megan Gentry, EMT/B, PP-ASEL | Internet (work): gentry!zk3.dec.com |
| Unix Support Engineering Group | (home): mbg!world.std.com |
| Compaq Computer Corporation | addresses need '_at_' in place of '!' |
| 110 Spitbrook Rd. ZK03-2/T43 | URL: http://world.std.com/~mbg/ |
| Nashua, NH 03062 | "pdp-11 programmer - some assembler |
| (603) 884 1055 | required." - mbg |
+--------------------------------+-------------------------------------+
Received on Sun Nov 07 1999 - 10:00:22 GMT

This archive was generated by hypermail 2.3.0 : Fri Oct 10 2014 - 23:32:28 BST