1.44M floppy on Color Computer (was Re: Ebay reaches new low)

From: Eric Smith <eric_at_brouhaha.com>
Date: Wed Nov 10 05:14:04 1999

"Sean 'Captain Napalm' Conner" <spc_at_armigeron.com> wrote:
> Again, the same bug as above. The D register is A and B combined (A being
> MSB, and B being LSB).

Fine. Just use Y instead. It does add two cycles, but since it's to the
path that was three cycles faster, it doesn't really matter:

        LDA <$DATAPORT

POLL: LDB <$DATAPORT ; 4
        STD ,X++ ; 8
        
        LDA <$DATAPORT ; 4
        LEAY -1,Y ; 4
        BNE POLL ; 3

        LDB <$DATAPORT
        STD ,X+

So it's now a minimum of 12 and 11 cycles on alternate bytes.

Or, if you insist on using the completion interrupt to abort the
loop:

        LDA <$DATAPORT

POLL: LDB <$DATAPORT ; 4
        STD ,X++ ; 8
        
        LDA <$DATAPORT ; 4
        BRA POLL ; 3

Which has a minimum of 12 and 7 cycles. I'm not sure whether the
completion interrupt will happen before the last STD; if it does,
the interrupt handler will have to copy the final two bytes from
the interrupt stack frame (for IRQ or NMI) or it's own save (for FIRQ).

Either way, the worst case is 12 cycles, which gives nearly twice the
speed tolerance you'd get at 13 cycles (15% vs. 8%).

Cheers,
Eric
Received on Wed Nov 10 1999 - 05:14:04 GMT