>You can deduce the pinouts from the printset :
The problem here is the only PDP-8 printsets I've got access to are the
ones on Highgate. I suspect a lot of other people have the same problem.
>8881 :
>1 Output A
>2 Input A1
>3 Input A2
>4 Output B
>5 Input B1
>6 Input B2
>7 Ground
>8 Input C2
>9 Input C1
>10 Output C
>11 Input D2
>12 Input D1
>13 Output D
>14 Vcc
>
>Each gate is an open-collector NAND gate, e.g. Output A = Input A1 NAND
>Input A2. On the G104 card, E24 :
>Section Bit
> A 11
> B 10
> C 9
> D 8
Question: Isn't this functionally the same as a 7401, at least it looks to
me based on the above and looking at info on the 7401 as if should be.
>DEC put a 4 digit code on these ICs. It's still a 384 logically, but it's
>been selected for something (timing?). Of course _getting_ a replaement
>now is non-trivial.
Unfortunatly the 384 looks rather non-standard compared to the info I've
got on hand (bit more than yesterday, while out taking care of stuff this
morning stopped at one of the local electronics places and picked up a NTE
Reference manual).
>> OK, one quick question on this that I've been meaning to clear up, but think
>> I've got right. '0' is the component side, and '1' is the back side,
>>right?
>
>Off by 1... '1' is the component side, '2' is the track side.
>
>MD0 means memory data bit 0, which according to the prints is on pin
>AK1. You _do_ have the Omnibus pinout, right?
Ouch, was I awake when I wrote that?!? Yes, I've got the pinout, in fact I
have both the actual book, and a printout of the pinouts from the scanned
in book (what can I say, easier than making xeroxes of the parts I need).
>> However, it looks like E46 is indeed bad. It doesn't seem to function like
>> it should. On E39 some of the legs get a single blip every eight examines
>> (yes, I know that isn't a very good way of describing it, but I didn't take
>> notes, plus I wasn't using the probe right).
>
>That sounds like what it should be doing. I assume E46 is not doing this.
Correct, E46 isn't doing that.
>OK, change E46. Now, where you get one (8251 decoder IIRC, no relation to
>the 8251 from Intel that's a USART) is another matter. I don't have any
>spares :-(
Well, there is at least one person locally that might have some spares if
I'm lucky. I don't suppose they're used on MicroVAXen or if necessary
Q-Bus PDP-11's
>> >For example. Put the logic probe on MD0 (MSB) on the backplane and
>> >deposit 7777. It blips low, right? Now examine that location (assumed to
>> >be a 'working' location) -- it blips low again.
>> >
>> >Now look at MD11 (LSB) and do the same things.
>>
>> All 12 lines of the MD Bus look to be functioning both ways. This was
>> tested with the proper voltage hooked up to the probe.
>
>Well, if all 12 data lines are doing the same thing when you deposit and
>examine 7777, then the memory may well be working, and the problem may be
>on the CPU boards. I will have a look at the prints and tech manual when
>I have a few minutes.
I might not have been totally clear here, when the data goes one direction,
it sets the line high, when it goes the other direction it sets it low. Or
should it be doing something else?
Hope to be able to get back at this tomorrow night, or first thing this
morning.
Zane
| Zane H. Healy | UNIX Systems Adminstrator |
| healyzh_at_aracnet.com (primary) | Linux Enthusiast |
| healyzh_at_holonet.net (alternate) | Classic Computer Collector |
+----------------------------------+----------------------------+
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|
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Received on Thu Nov 25 1999 - 04:14:04 GMT