If you're after something more general than a divide-by-two, you might want to
consider a "rate multiplier" of one sort or another. These are multistage
divide-by-n devices, though they may not, in the usual TTL form, work at the
rates you need.
If you do a little reading, the clock generation problem has been very well
treated over the past decade, with a variety of phase-locked oscillators that
use the 14.318 MHz oscillator present on most PC motherboards and multiplying
them up to the multiple-hundreds or multiple phases of 66 MHz or whatever, that
they feed to the processor in question. Some of them are so totally
encapsulated and digitally controllable, that you need very few external
passives to make them work.
Dick
----- Original Message -----
From: "Tony Duell" <ard_at_p850ug1.demon.co.uk>
To: <classiccmp_at_classiccmp.org>
Sent: Thursday, March 29, 2001 10:50 AM
Subject: Re: constructing TTL frequency divide by x question.
> >
> > Hi all,
> >
> > Doesn't make sense to buy single TTL oscillator while I have
> > lots of other osc chips that has compatiable frequencies that I can
> > divide down.
> >
> > A computer needs 12.5 MHz TTL oscillator to clock that '040 at 25MHz.
> > Right now that motherboard uses 10MHz OSC nearby for a bogus 'LC040
> > 20MHz and have a real '040-25 coming in to swap out that fpu-less
> > chip and bump up that MHz. That motherboard is *exact* same board
> > used in 20 and 25, 40 and 50MHz Macs including one low end Mac
> > server. (!!)
> >
> > What is proper way to build up a reliable divide down TTL or
> > cmos circuit output just with 5V and ground and a oscillator? Say, I
> > divide 25 by 2 or 50 by 4 to get 12.5MHz.
>
>
> The simplest circuit is to use a D-type flip-flop (say half of a 74F74 in
> this case). Link S/ and R/ high (through a 1K resistor if you are a
> purist), link D to Q/ and feed the input to CLK. Then take the output
> from Q.
>
> Don't forget a decoupling capacitor (0.1uF ceramic) between Vcc and
> Ground close to the chip.
>
> A single 74F74 can make 2 of these circuits, which you can cascade (link
> Q of the first one to CLK of the second one) to make a divide-by-4
>
> You can also use a JK flip-flop (something like a half a 74F112 if you
> can find one) with J and K both tied high (or pulled high via a 1K
> resistor). Again, tie S/ and R/ high, feed the input to CLK, and take the
> output from Q.
>
> You can cascade those in the same way. And they need the 0.1uF decoupling
> capacitor.
>
> -tony
>
>
Received on Thu Mar 29 2001 - 13:29:29 BST