constructing TTL frequency divide by x question.

From: Richard Erlacher <edick_at_idcomm.com>
Date: Fri Mar 30 20:44:14 2001

The odd thing in this case, is that I had the impression that what was wanted
was a way to generate ANY desired frequency from ANY available crystal. That's
a tall order, which may be why I had such trouble making sense of the rather
bizarre initial post. There are some clock frequencies that readily produce a
long list of useful frequencies, i.e. harmonics of both the baud rates and of
useful timing rates. However, since the original post indicated the writer was
enamored of handy integral frequencies readily quoted by the marketing
department
at nearly any CPU vendor, it looked to me as though what he was after was a way
to generate the "other" useful frequencies, e.g. baud rate generator input
clock, etc, from whatever crystal he had on board. A rate multiplier would do
that sort of thing nicely. If it doesn't fit, however, it's well to note that
5% is close enough for baud rates, and that if that doesn't allow for the use of
"common" oscillator frequencies, one of the many multiplier/divider PLL devices
now quite ubiquitous thanks to PC motherboards and other devices that use them
would easily do the job.

Dick

----- Original Message -----
From: "Tony Duell" <ard_at_p850ug1.demon.co.uk>
To: <classiccmp_at_classiccmp.org>
Sent: Friday, March 30, 2001 11:08 AM
Subject: Re: constructing TTL frequency divide by x question.


> >
> > If you're after something more general than a divide-by-two, you might want
to
> > consider a "rate multiplier" of one sort or another. These are multistage
>
> I wouldn't have thought a rate multiplier was that useful here.
>
> The rate multipliers I am used to have n control inputs. If you set these
> to a binary number M, you get M output pulses for every 2^n inputs clock
> pulses. And those output pulses, while obviously synchronised to the
> input clock, are as evenly spaced as possible. So if, for example, you
> have a 4-input one and set the inputs to 1000, you get 8 output pulses
> for 16 input pulses, and those output pulses appear synchronised to every
> other input clock. But unless the number you set is a divisor of the
> total number of states, the output pulses will not be evenly spaced.
>
> And to use one to do a division by 2^m is adding complexity to the
> circuit for no good reason. A chain of D-types, or a synchronous counter,
> is a lot simpler.
>
> -tony
>
>
Received on Fri Mar 30 2001 - 20:44:14 BST

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