CPU design at the gate level
At 08:15 AM 10/31/01, Ben wrote:
>That is true there is baggage.My two gripes today are
>
>1) No bootstrapping a minimal system in hardware & software - you need
>everything to run.
Take a page from Classic computers as I did and put a dedicated "console
processor" on the front of your FPGA. I've got a board for doing a "soft"
robot CPU that I hope to get to after BattleBots that has a PIC chip (small
single chip MCU) as the console processor. It loads the main CPU from
either serial EEPROM or from a serial line into the FPGA on power up,
sequences the power, and provides the diagnostic interface when things go
strangely.
>2) Non serviceable equipment and docs.
This is truly a pain.
--Chuck
Received on Wed Oct 31 2001 - 10:55:59 GMT
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