The Z8000 segmented address scheme has two forms. The long form that you
described uses two 16 bit values (registers or memory locations). The
short form uses a single 16 bit value with the 7 bit segment number in
bits 9-15 and an 8 bit offset into the segment in bits 1-8. Bit 16 of
the first 16 bit value is a flag which indicates long or short segment
address. This is important for memory addresses operands as the CPU can
get an address word operand from memory, and then based on the flag bit
can decide if the next word must be read to get the complete long
address. In either case the segment address is located in the same place
in either a short segment address or the first word of a long segmented
address.
David
> -----Original Message-----
> From: cctalk-bounces_at_classiccmp.org
> [mailto:cctalk-bounces_at_classiccmp.org] On Behalf Of SHAUN RIPLEY
> Sent: Monday, 26 July 2004 1:27 PM
> To: cctalk_at_classiccmp.org
> Subject: z8000 segment scheme question
>
>
> I picked up one of my computer books today and read
> that z8000 uses one 16 bit register to hold the 7 bit
> segment number and one register to hold the 16 bit
> offset. The strange thing is that the segment number
> is hold in position of bit 9-14 other than the bottom
> half of the first register. I goggled and found
> complaint about this scheme but no one explained why
> it was designed so. Could somebody on the list tell me why?
>
>
>
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Received on Mon Jul 26 2004 - 19:04:29 BST