Tim's own version of the Catweasel/Compaticard/whatever

From: Chuck McManis <cmcmanis_at_mcmanis.com>
Date: Tue Jul 4 13:33:19 2000

First, this is a really cool idea. I am glad someone has taken the time to
make it real.

At 02:06 PM 7/4/00 -0400, Tim wrote:
>Chip lineup in my current design:

[bunch of parts]

> 8 MHz crystal clock.
> 1 62C1024 128K*8 SRAM.
         1 Xilinx CPLD (XC9572 should more than handle it)

The CPLD comes in a PLCC (44 pin) and thus is "hacker friendly" If you send
me a schematic I can generate a bit file for the PLD. Digikey sells these
for $5.53 in single quantities, if we can get by with fewer logic cells
then the cheaper one is $3.30 each in single quantities.

>I took some pains in my design to allow things to be sped up for more
>oversampling at a later date.

The CPLD is supposed to run up to 100Mhz so you should have some head-room.
I could do a timing analysis at 16, 20, and 24Mhz and see if anything falls
out of spec.

>Anything with a bidirectional parallel port oughta work fine.

This is definitely the way to go, it has become a fairly "universal" interface.

Point me to the schematics and I'll see if it will fit in the smallest CPLD.

--Chuck
Received on Tue Jul 04 2000 - 13:33:19 BST