CPU design at the gate level

From: Chuck McManis <cmcmanis_at_mcmanis.com>
Date: Wed Oct 31 15:49:08 2001

At 12:30 PM 10/31/01, Ben wrote:
>I used a PDP-8/e and a PDP-S all in one BOX computers. :)
>It is hard to get use to several meg of bits in a 8 bit package when you
>still remember using core memory.

However the bits in the FPGA simply represent wires in the PDP-8 and where
you had a couple million millimeters of wire in a PDP-8 system you have
less than 100 mm of wire in an FPGA system.

Don't confuse the configuration bits with actual memory, they are routing
resources, and there were just as many in the PDP-8, only the ones on the
PDP-8 are etched into circuit boards. That doesn't mean they didn't exist
however in the form of drawings on Gordon Bell's and others tables.

DTL -> TTL -> LSI -> FPGA, the gates are the same, just the wires got
smaller and the way one manipulates them changed.

(wire wrap -> copper traces -> silicon traces -> data bits)

Received on Wed Oct 31 2001 - 15:49:08 GMT

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